PART |
Description |
Maker |
ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 Radiation Hardened Dual D Flip Flop with Set and Reset D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
MC74VHCT74ADR2 MC74VHCT74ADR2G MC74VHCT74ADTR2 MC7 |
Dual D-Type Flip-Flop with Set and Reset
|
ON Semiconductor
|
MC10EP29MNTXG |
3.3V / 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 10E SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, QCC20
|
ON Semiconductor
|
MC74LVX74-D |
Dual D-Type Flip-Flop with Set and Clear With 5V Tolerant Inputs
|
ON Semiconductor
|
74LVC74ABQ-Q100 74LVC74AD-Q100 74LVC74APW-Q100 |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors
|
HCS109HMSR HCS109KMSR FN2466 HCS109MS HCS109D HCS1 |
Radiation Hardened Dual JK Flip Flop HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 Radiation Hardened Dual JK Flip Flop(抗辐射双J-K触发 辐射加固JK触发器拖鞋(抗辐射双JK触发器) From old datasheet system Flip Flop, JK, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil, Corp. INTERSIL[Intersil Corporation]
|
74F50729 N74F50729N I74F50729D I74F50729N N74F5072 |
Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics
|
NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
|
74HCT74N 74HCT74BQ 74HCT74D 74HCT74DB 74HC74 74HCT |
Dual D-type flip-flop with set and reset; positive edge-trigger Dual D-type flip-flop with set and reset; positive edge-trigger
|
NXP Semiconductors
|
74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 From old datasheet system
|
NXP Semiconductors N.V. PHILIPS[Philips Semiconductors]
|
5962F9863201VCC 5962F9863201V9A 5962F9863201VXC AC |
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16 AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16 Radiation Hardened Dual J-K Flip-Flop with Set and Reset 辐射硬化的设置和复位JK触发
|
Intersil Corporation Intersil, Corp.
|
HCTS74MS |
Flip Flop, D-Type, with Set and Reset, TTL Inputs, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil
|
74AUP1G74GD 74AUP1G74GM125 |
Low-power D-type flip-flop with set and reset; positive-edge trigger Low-power D-type flip-flop with set and reset; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors
|